The Transmission-Gate's input is connected to the D_LATCH data input (D), the control input to the Transmission-Gate is connected to the D_LATCH enable input (EN) and the Transmission-Gate output is the D_LATCH output (Q)
Draw a Transmission Gate-based D-Latch?
Answer of Selected Question
|Download Hardware Design Interview Questions And Answers PDF|
|Previous Interview Question||Next Interview Question|
|Suppose you have a combinational circuit between two registers driven by a clock. What will you do if the delay of the combinational circuit is greater than your clock signal?||What are the different Adder circuits you studied?|