Computer Architecture and Design Question:
What are the five stages in a DLX pipeline?
Answers:
Answer #1The instruction sets can be differentiated by
► Operand storage in the CPU
► Number of explicit operands per instruction
► Operand location
► Operations
► Type and size of operands
► Operand storage in the CPU
► Number of explicit operands per instruction
► Operand location
► Operations
► Type and size of operands
Answer #21. Fetch
2. Decode / Issue
3. Execution
4. Memory
5. Commit / Write back
2. Decode / Issue
3. Execution
4. Memory
5. Commit / Write back
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